Alternate test generation for detection of parametric faults.

摘要

Tests for detecting faults in analog and mixed-signal circuits have been traditionally derived from the datasheet specifications. Although these specifications describe important aspects of the device, in many cases, these application oriented tests are costly to implement and are inefficient in determining product quality. Increasingly, the gap between specification test requirements and the capabilities of test equipment has been widening. In this work, a systematic method to generate and evaluate alternate tests for detecting parametric faults is proposed. We recognize that certain aspects of analog test generation problem are not amenable to automation. Additionally, functional features of analog circuits are widely varied and cannot be assumed by the test generator. To overcome these problems, an extended device under test (DUT) model is developed that encapsulates the DUT and the DUT specific tasks. The interface of this model provides a well-defined and uniform view of a large class of devices. This permits several simplifications in the test generator. The test generator is uses a search-based procedure that requires evaluation of a large number of candidate tests. Test evaluation is expensive because of complex fault models and slow fault simulation techniques. A tester-resident test evaluation technique is developed to address this issue. This method is not limited by simulation complexity nor does it require an explicit fault model. Making use of these two developments, an efficient and automated test generation method is developed. Theoretical development and a number of examples are used to illustrate various concepts that are presented in this thesis.