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Modeling of via interconnects in parallel-plate environments and suppression of the induced ground/power noise.

机译:在平行板环境中对过孔互连进行建模并抑制感应的接地/电源噪声。

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摘要

The limiting factors in implementing faster printed circuit boards and integrated circuit architectures for modern electronic systems are interconnects and packaging constraints rather than semiconductor device performance. The efficient interconnection of high density input and output signals is no longer possible by only utilizing planar interfaces. Therefore, routing by means of vertical interconnects such as vias through multiple layers is unavoidable. Especially, when vias penetrate through the conductor planes or are buried in between them, their induced electrical effects are not only limited to the generation of conducted noise (reflections) but also include the generation of radiated noise in the form of voltage fluctuations on the conductor planes. The pair of conductor planes form a parallel-plate waveguide (PPW), thus the induced noise is in fact a waveguide mode, and it is called PPW noise in this thesis.; With the ever-increasing clock frequencies of digital circuits and the emergence of low power integrated circuits, the bottle-neck imposed by the PPW noise becomes more and more significant. Therefore, two distinct tasks are undertaken in the present dissertation; the development of physics-based models to capture the PPW noise in various structures, and the introduction of a novel approach for the global suppression of this noise, as opposed to conventional localized methods. In the modeling endeavor, fast and accurate representative models based on radial transmission line theory are developed which can be integrated with circuit components. On the other hand, by utilizing these equivalent circuits, different methods of noise suppression have been studied while giving insight to the noise characteristics which lead to the development of a novel approach for noise suppression. In the proposed method, Electromagnetic Bandgap (EBG) structures are employed to provide an omnidirectional suppression of the PPW noise. Simulations and measurements carried on a number of test structures are presented herein to validate the accuracy of the developed models and prove the successful global suppression of the PPW noise by utilizing EBG surfaces.
机译:为现代电子系统实现更快的印刷电路板和集成电路体系结构的限制因素是互连和封装限制,而不是半导体器件的性能。仅使用平面接口就不再可能实现高密度输入和输出信号的有效互连。因此,不可避免的是通过诸如互连的垂直互连穿过多层布线。特别是,当通孔穿透导体平面或掩埋在导体平面之间时,它们的感应电效应不仅限于传导噪声(反射)的产生,而且还包括导体上电压波动形式的辐射噪声的产生。飞机。一对导体平面形成一个平行板波导(PPW),因此感应噪声实际上是一种波导模式,在本文中被称为PPW噪声。随着数字电路时钟频率的不断提高和低功率集成电路的出现,PPW噪声带来的瓶颈越来越明显。因此,本论文承担了两个不同的任务。与传统的局部方法相反,开发了基于物理学的模型以捕获各种结构中的PPW噪声,并引入了一种全局抑制这种噪声的新颖方法。在建模方面,开发了基于径向传输线理论的快速准确的代表性模型,该模型可以与电路组件集成。另一方面,通过利用这些等效电路,在研究噪声特性的同时研究了不同的噪声抑制方法,这导致了新型噪声抑制方法的发展。在提出的方法中,电磁带隙(EBG)结构用于提供PPW噪声的全向抑制。本文介绍了在许多测试结构上进行的仿真和测量,以验证开发模型的准确性,并证明通过利用EBG表面成功抑制了PPW噪声。

著录项

  • 作者

    Abhari, Ramesh.;

  • 作者单位

    University of Toronto (Canada).;

  • 授予单位 University of Toronto (Canada).;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2003
  • 页码 153 p.
  • 总页数 153
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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