首页> 外文学位 >Technology-independent CMOS op amp in minimum channel length.
【24h】

Technology-independent CMOS op amp in minimum channel length.

机译:通道长度最小的技术独立的CMOS运算放大器。

获取原文
获取原文并翻译 | 示例

摘要

The performance of analog integrated circuits is dependent on the technology. Digital circuits are scalable in nature, and the same circuit can be scaled from one technology to another with improved performance. But, in analog integrated circuits, the circuit components must be re-designed to maintain the desired performance across different technologies. Moreover, in the case of digital circuits, minimum feature-size (short channel length) devices can be used for better performance, but analog circuits are still being designed using channel lengths larger than the minimum feature sizes. The research in this thesis is aimed at understanding the impact of technology scaling and short channel length devices on the performance of analog integrated circuits. The operational amplifier (op amp) is chosen as an example circuit for investigation. The performance of the conventional op amps are studied across different technologies for short channel lengths, and techniques to develop technology-independent op amp architectures have been proposed. In this research, three op amp architectures have been developed whose performance is relatively independent of the technology and the channel length. They are made scalable, and the same op amp circuits are scaled from a 0.25 mum CMOS onto a 0.18 mum CMOS technology with the same components. They are designed to achieve large small-signal gain, constant unity gain-bandwidth frequency and constant phase margin. They are also designed with short channel length transistors. Current feedback, gm boosted, CMOS source followers are also developed, and they are used in the buffered versions of these op amps.
机译:模拟集成电路的性能取决于技术。数字电路本质上是可扩展的,并且同一电路可以从一种技术扩展到另一种技术,从而提高性能。但是,在模拟集成电路中,必须重新设计电路组件,以在不同技术之间保持所需的性能。而且,在数字电路的情况下,可以使用最小特征尺寸(短通道长度)的设备来获得更好的性能,但是仍在设计模拟电路时使用大于最小特征尺寸的通道长度。本文的研究旨在了解技术规模和短通道长度器件对模拟集成电路性能的影响。选择运算放大器(运放)作为示例电路进行研究。针对不同的短通道长度技术,研究了常规运算放大器的性能,并提出了开发与技术无关的运算放大器架构的技术。在这项研究中,开发了三种运算放大器架构,其性能相对独立于技术和通道长度。它们具有可扩展性,并且相同的运算放大器电路从0.25微米CMOS缩放到具有相同组件的0.18微米CMOS技术。它们旨在实现大的小信号增益,恒定的单位增益带宽频率和恒定的相位裕量。它们还设计有短沟道长度的晶体管。还开发了电流反馈,GM升压型CMOS源极跟随器,并将其用于这些运算放大器的缓冲版本中。

著录项

  • 作者

    Sengupta, Susanta.;

  • 作者单位

    Georgia Institute of Technology.;

  • 授予单位 Georgia Institute of Technology.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2004
  • 页码 289 p.
  • 总页数 289
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号