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Low noise design techniques for radio frequency integrated circuits.

机译:射频集成电路的低噪声设计技术。

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摘要

Wireless communication has experienced explosive growth world-wide in the last decade and its huge market potential is driving relentless efforts in the information industry to improve the performance of wireless communication systems. Academia has also witnessed a flourish of research activities in communications, digital signal processing and radio frequency integrated circuit design.; A major objective of wireless communication is the need to operate in hostile environments while achieving accurate transmission and reception of information, in which one of the great challenges is achieving sufficient fidelity in the presence of "unwanted signals" such as noise and interference nearby. For example, the ubiquitous thermal noise in electronic circuits degrades the signal-to-noise ratio (SNR) of received signals. In this dissertation this critical issue is addressed in the development of low-noise design techniques for radio frequency integrated circuits. Although the discussion is focused primarily on Complementary Metal Oxide Semiconductor (CMOS) technology, some of the techniques described in the thesis are also applicable to bipolar junction transistor (BJT) technologies.; Low-noise amplifier (LNA) is a critical amplification stage in the on-chip portion of a receiver chain, which requires low noise and high gain. In this dissertation, a novel gm-boosted common-gate LNA (CGLNA) architecture is proposed herein that exhibits lower noise figure with lower power consumption than the conventional CGLNA. It preserves the advantage of insensitivity to parasitics at input and is well suitable for high-frequency applications.; The spectral purity of the local oscillator (LO) signal is of great importance since it directly affects the SNR of the down-converted signal. The LO signal is usually generated using a phase-locked loop (PLL) wherein the required voltage-controlled oscillator (VCO) is often the main source of phase noise. In this work, a novel differential Colpitts VCO and a quadrature VCO are proposed that result in lower phase noise and more robust start-up characteristics than previous approaches.; In contrast to the belief that RF circuit design is a mature subject, this dissertation demonstrates that significant performance benefits are obtained with continued design innovations. With the aggressive scaling of CMOS technology, efforts in CMOS RF IC design will continue for many years into the future.
机译:在过去的十年中,无线通信在全球范围内经历了爆炸性的增长,其巨大的市场潜力正在推动信息行业为提高无线通信系统的性能做出不懈的努力。学术界还见证了在通信,数字信号处理和射频集成电路设计方面的研究活动。无线通信的主要目标是需要在敌对环境中进行操作,同时实现信息的精确传输和接收,其中最大的挑战之一是在附近存在诸如噪声和干扰之类的“有害信号”的情况下实现足够的保真度。例如,电子电路中普遍存在的热噪声会降低接收信号的信噪比(SNR)。在本文中,这个关键问题在射频集成电路的低噪声设计技术的发展中得到了解决。尽管讨论主要集中在互补金属氧化物半导体(CMOS)技术上,但本文中描述的某些技术也适用于双极结型晶体管(BJT)技术。低噪声放大器(LNA)是接收器链片上部分中的关键放大级,需要低噪声和高增益。在本文中,本文提出了一种新型的gm提升的共栅LNA(CGLNA)架构,该架构具有比常规CGLNA更低的噪声系数和更低的功耗。它保留了对输入的寄生虫不敏感的优势,非常适合高频应用。本地振荡器(LO)信号的频谱纯度非常重要,因为它直接影响下变频信号的SNR。 LO信号通常使用锁相环(PLL)生成,其中所需的压控振荡器(VCO)通常是相位噪声的主要来源。在这项工作中,提出了一种新颖的差分Colpitts VCO和一个正交VCO,它们比以前的方法具有更低的相位噪声和更鲁棒的启动特性。与认为射频电路设计是一个成熟的主题相反,本文证明了通过不断的设计创新可以获得明显的性能优势。随着CMOS技术的大规模发展,CMOS RF IC设计的努力将在未来很多年内继续进行。

著录项

  • 作者

    Li, Xiaoyong.;

  • 作者单位

    University of Washington.;

  • 授予单位 University of Washington.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2004
  • 页码 127 p.
  • 总页数 127
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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