The problem of maliciously intended modifications in hardware intellectual property (IP) and manufactured integrated circuits (ICs), commonly known as hardware Trojans, has recently garnered interest not only in academia but also in governmental agencies and industry. Partly because of design outsourcing and migration of fabrication to low-cost areas across the globe, and partly because of increased reliance on third-party intellectual property and design automation software, the integrated circuit supply chain is now considered far more vulnerable to malicious modifications than ever before. Such modifications, known as hardware Trojans, provide additional functionality that is unknown to the designer and user, but which can be exploited by the perpetrator after deployment to sabotage or incapacitate a chip, or to steal sensitive information.;This thesis outlines the challenges and elucidates the research opportunities associated with certifying trustworthiness of integrated circuits. Four solutions developed by the author for various instances of the problem will be discussed which include i) the use of side-channel information along with statistical analysis methods to detect hardware Trojans in digital circuits. ii) Hardware Trojan detection in wireless cryptographic ICs. A wireless cryptographic chip along with its Trojan-infected variants are currently being fabricated to demonstrate the effectiveness of the proposed method using actual silicon measurements. iii) The use of on-chip neural networks for post-deployment trust monitoring. A general trust evaluation architecture is proposed to harden original circuits with on-chip classifier and on-chip measurement acquisition sensors. iv) A novel third-party hardware IP acquisition and delivery protocol facilitating IP core trustworthiness evaluation based on proof-carrying code (PCC) concepts.
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