Stainless steel and silicon direct interface synthesis: Chemical bonding effects.

摘要

Planar stainless steel/stainless steel interfaces, with and without a titanium interlayer and silicon/silicon interfaces have been produced in an ultra high vacuum (UHV) diffusion bonding/deposition instrument. Interface synthesis was accomplished by diffusion bonding two substrates after subjecting the substrate surfaces to a variety of pre-bonding treatments including heat treating, ion-beam sputter cleaning and thin film deposition. Chemical characterization was performed in situ by Auger electron spectroscopy (AES) prior to deposition and/or bonding and ex situ by energy dispersive X-ray spectroscopy (EDS) and electron energy loss spectroscopy (EELS). Additionally, transmission electron microscopy (TEM), scanning electron microscopy (SEM) and atomic force microscopy (AFM) were used to study interfaces before and after bonding.; Diffusion bonding behavior of stainless steel depends strongly on the chemistry of the surfaces to be bonded. Very smooth, mechanically polished and lapped substrates would bond completely in UHV in 1 hour at 1000°C under 3.5 MPa uniaxial pressure, if the native oxide on the substrates was removed by ion beam cleaning. No voids were observed in these bonded interfaces as studied by TEM and the strength was equal to the unbonded bare material. When an electron beam deposited, 200 A titanium interlayer was added to the stainless steel interface, while bonding under the same conditions, mechanical tensile testing resulted in very low strength when compared with that of chemically clean stainless steel interfaces. Analytical inspection of the interfaces, performed with EELS, EDS, and convergent beam electron diffraction (CBED) coupled with images from TEM and SEM, showed the reason for the significantly reduced strength is a result of limited contact area and delamination between titanium carbide particles precipitated in the interface.; Silicon wafers bicrystals were synthesized by bonding two single-crystal substrates. Silicon wafers were plasma or ion cleaned, chemically treated, and UHV thermal desorption annealed in different combinations to find the best method for providing smooth, contamination free substrates that will produce an atomically flat, chemically clean silicon/silicon bonded interface. Plasma cleaned wafers which were subsequently HF and de-ionized water dipped resulted in a flat and void free wafer bonded interface that was structurally sharp on the atomic scale.