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First order model checking of o-automata using multiway decision graphs.

机译:使用多路决策图对o-自动机进行一阶模型检查。

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摘要

As the complexity of hardware digital systems increases, their correctness becomes a major concern. Traditional verification by simulation is infeasible to exhaustively test and guarantee correctness. More than a decade ago, however, formal verification has been introduced as complement technique to simulation. Formal methods establish that a design implementation satisfies its specification by mathematical reasoning. Among several techniques, model checking is one of the most successful technology, which is based on the exploration of the design state space. In this thesis, we propose a new model checking method based on the theory of o-automata and multiway decision graphs (MDGs). Unlike reduced ordered binary decision diagrams (ROBDDs), MDGs allow system models to be described using abstract state machines (ASMs) through abstract data sorts and uninterpreted function symbols, hence enabling the verification of larger designs independent of the datapath width.; Given an ASM and a first-order linear time temporal logic property, the model checking problem proposed in this thesis is reduced to a language emptiness checking of an o-automaton that accepts all o-words produced by the system violating the property formula. The checking method comprises four steps: (1) transforming the first-order property into a propositional formula by constructing ASMs for the atomic formulas of the property; (2) generating an o-automaton from the negation of the transformed propositional formula; (3) computing the product of the generated automaton, the system model ASM and the constructed ASMs; and (4) applying a language emptiness checking algorithm on the product automaton. Three different checking algorithms have been developed, implemented, and proved correct in this thesis.; To evaluate the performance of the proposed model checking method and implemented tool, we conducted several experimentations and case studies. We also compared the efficiency of our tool with an existing MDG regular model checking application, as well as with popular ROBDD-based automata model checking tools such as VIS. Our model checker was found to be outperforming the above tools.
机译:随着硬件数字系统的复杂性增加,其正确性成为主要问题。传统的仿真验证无法彻底测试并保证正确性。然而,十多年前,形式验证已被引入作为仿真的补充技术。形式化方法通过数学推理确定设计实现满足其规范。在多种技术中,模型检查是最成功的技术之一,它基于对设计状态空间的探索。本文基于o-自动机和多路决策图(MDG)理论,提出了一种新的模型检验方法。与简化的有序二进制决策图(ROBDD)不同,MDG允许使用抽象状态机(ASM)通过抽象数据排序和未解释的功能符号来描述系统模型,从而能够独立于数据路径宽度来验证更大的设计。在给定ASM和一阶线性时间时态逻辑属性的情况下,本文提出的模型检查问题简化为接受系统违反属性公式产生的所有o字的o自动机的语言空度检查。该检查方法包括四个步骤:(1)通过构造属性的原子公式的ASM将一阶属性转换为命题公式; (2)根据求逆的命题公式的否定产生o-自动机。 (3)计算生成的自动机,系统模型ASM和所构造的ASM的乘积; (4)在产品自动机上应用语言空度检查算法。本文开发,实现并证明了三种不同的检查算法是正确的。为了评估所提出的模型检查方法和实施工具的性能,我们进行了一些实验和案例研究。我们还将工具的效率与现有的MDG常规模型检查应用程序以及流行的基于ROBDD的自动模型检查工具(例如VIS)进行了比较。我们的模型检查器的性能优于上述工具。

著录项

  • 作者

    Wang, Fang.;

  • 作者单位

    Concordia University (Canada).;

  • 授予单位 Concordia University (Canada).;
  • 学科 Computer Science.
  • 学位 Ph.D.
  • 年度 2005
  • 页码 p.4330
  • 总页数 153
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 自动化技术、计算机技术;
  • 关键词

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