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Enhanced symbolic simulation for verification of embedded memory systems and datapaths.

机译:增强的符号仿真,用于验证嵌入式内存系统和数据路径。

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摘要

With the ever increasing complexity of digital integrated systems, the verification becomes the bottleneck in the design flow and the problem has been exacerbated by the reduced times-to-market. The modern VLSI design becomes data-intensive in nature. Much data needs to be stored on-chip and computed with complex algorithms to achieve the high-performance applications. The embedded memory systems and datapaths occupy the majority of areas in the full-chip design. Both of them have been shown the difficulty in verification.; OBDD-based symbolic simulation is a powerful engine with unique advantages to target the embedded memory systems and datapaths. However, it is easy for OBDD to suffer from the memory space explosion problem. A symbolic simulator with effective, robust and generic methods is urgently needed for the modern VLSI designs.; In this dissertation, we have developed an enhanced symbolic simulator which incorporated a universal data structure (called 2-tuple list). Several techniques are applied for the symbolic simulation to effectively avoid the OBDD size explosion. It includes the symbolic encoding, OBDD decomposition for equality function and OBDD partitioning. There is one critical concept as a thread to connect the entire dissertation: the exploration of critical "control" signals for verification. The control signals are related to the important properties of the data flow in the memory systems and datapaths. These control signals exist in the high-level behavioral descriptions and can be implemented in the RT-level, gate-level or transistor-level netlist. They can also implicitly exist in the OBDD representations. The control signals are very important to improve the efficiency of symbolic simulation. They are used in case splitting to apply the symbolic encoding. They are also used to partition a monolithic OBDD into several OBDDs at the decision points. For the datapath operators, the control signals are helpful to determine the optimal OBDD variable ordering. In the equivalence checking of two datapath circuits, we used the circuit re-structure approaches to recover the control signals and increase the similarity of two circuits under comparison.; We will discuss the methods in detail to extract and make use of the control signals in the symbolic simulation. The embedded memory systems such as the memory management unit and the datapath designs such as the floating point adder and arithmetic operators are verified with our symbolic simulator.
机译:随着数字集成系统复杂性的不断提高,验证已成为设计流程的瓶颈,而缩短的上市时间又加剧了问题。现代的VLSI设计本质上是数据密集型的。许多数据需要存储在芯片上,并需要使用复杂的算法进行计算才能实现高性能应用。嵌入式存储器系统和数据路径占据了全芯片设计的大部分领域。他们两个都被证明难以核实。基于OBDD的符号仿真是功能强大的引擎,具有针对嵌入式存储器系统和数据路径的独特优势。但是,OBDD容易遭受内存空间爆炸问题的困扰。现代VLSI设计迫切需要一种具有有效,鲁棒和通用方法的符号模拟器。在本文中,我们开发了一种增强的符号模拟器,该模拟器结合了通用数据结构(称为2元组列表)。几种技术应用于符号仿真,以有效避免OBDD大小爆炸。它包括符号编码,用于相等函数的OBDD分解和OBDD分区。有一个关键概念作为连接整个论文的线程:探索关键的“控制”信号以进行验证。控制信号与存储系统和数据路径中数据流的重要属性有关。这些控制信号存在于高级行为描述中,可以在RT级,栅极级或晶体管级网表中实现。它们也可以隐式存在于OBDD表示中。控制信号对于提高符号仿真的效率非常重要。它们用于大小写拆分以应用符号编码。它们还用于在决策点将整体式OBDD划分为几个OBDD。对于数据路径运算符,控制信号有助于确定最佳OBDD变量排序。在两个数据路径电路的等效性检查中,我们使用了电路重构方法来恢复控制信号并在比较中增加两个电路的相似性。我们将详细讨论在符号仿真中提取和利用控制信号的方法。嵌入式存储器系统(例如内存管理单元)和数据路径设计(例如浮点加法器和算术运算符)已通过我们的符号模拟器进行了验证。

著录项

  • 作者

    Feng, Tao.;

  • 作者单位

    University of California, Santa Barbara.;

  • 授予单位 University of California, Santa Barbara.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2005
  • 页码 183 p.
  • 总页数 183
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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