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Impact of uniaxial strain on the electrical characteristics of MOSFETs and Esaki tunnel diodes.

机译:单轴应变对MOSFET和Esaki隧道二极管的电气特性的影响。

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摘要

Process-induced uniaxial strain is widely used in CMOS transistor fabrication in order to increase carrier mobility or current drive because of strain-induced band structure changes. Although a significant body of research exists on uniaxially-strained MOSFETs, most previous effort has focused on carrier mobility, how to augment it with strain and how to understand the strain-induced change. In this study, measurements and analysis of the effects of uniaxial-stress-induced changes in MOSFET mobility are extended to explore stress dependent changes in mobility degradation factor, on- and off-state gate tunneling current, impact ionization rate, C-V characteristics, and ring oscillator performance (standby and dynamic power dissipation and speed).;In addition to this exploration of uniaxial-strain-induced changes in MOSFETs, Esaki diodes offer a new transport laboratory, i.e. interband tunneling, for understanding the effects of uniaxial strain. Very few papers have been published on the influence of stress on the current-voltage characteristics of Esaki tunnel diode and the strain effects are poorly understood. In this thesis, the impact of uniaxial strain on the peak tunneling current density of Esaki tunnel diodes is theoretically calculated, considering strain-induced changes in the bandgap, electron repopulation among different valleys (only for multi-valley conduction band minimum) and the reduced mass along the tunneling directions. Esaki tunnel diodes, made of four different materials, i.e. Si, Ge, GaAs and InAs, are studied with tunneling current flowing along three different directions (100>, 110> and 111>) and with uniaxial stress applied either parallel or perpendicular to the tunneling current direction. The theory is compared to the available experimental results and a good agreement between the calculation and experimental data is obtained. From the theoretical calculation, it is found that uniaxial stress can be used to improve peak tunneling current density of Esaki tunnel diodes and the optimum directions for current and uniaxial stress are identified to achieve the largest increase in peak tunneling current for a given magnitude of uniaxial stress.
机译:由于应变引起的能带结构变化,工艺引起的单轴应变被广泛用于CMOS晶体管制造中,以增加载流子迁移率或电流驱动。尽管对单轴应变MOSFET进行了大量研究,但大多数以前的工作都集中在载流子迁移率,如何通过应变来增加它以及如何理解应变引起的变化上。在这项研究中,对单轴应力引起的MOSFET迁移率变化的影响进行了测量和分析,以探索与应力有关的迁移率下降因子,通态和断态栅极隧穿电流,冲击电离速率,CV特性和环形振荡器的性能(待机和动态功耗以及速度)。除了对MOSFET的单轴应变引起的变化进行探索之外,Esaki二极管还提供了一个新的传输实验室,即带间隧穿,以了解单轴应变的影响。关于应力对Esaki隧道二极管的电流-电压特性的影响的论文很少,并且对应变的影响了解甚少。在本文中,从理论上计算了单轴应变对Esaki隧道二极管的峰值隧穿电流密度的影响,其中考虑了应变引起的带隙变化,不同波谷之间的电子再填充(仅对于多谷导带最小)和减小的沿隧道方向的质量。研究了由四种不同材料(即Si,Ge,GaAs和InAs)制成的Esaki隧道二极管,其隧穿电流沿三个不同方向(<100>,<110>和<111>)流动,并施加了平行或单向应力。垂直于隧道电流方向。将该理论与现有的实验结果进行了比较,并在计算和实验数据之间取得了良好的一致性。从理论计算中发现,单轴应力可用于改善Esaki隧道二极管的峰值隧穿电流密度,并且确定了电流和单轴应力的最佳方向,以在给定的单轴幅度下实现峰值隧穿电流的最大增加强调。

著录项

  • 作者

    Zhao, Wei.;

  • 作者单位

    University of Notre Dame.;

  • 授予单位 University of Notre Dame.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2006
  • 页码 134 p.
  • 总页数 134
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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