A digital UWB transmitter is implemented in Deep-Submicron (DSM) CMOS to achieve a compact, cheap to manufacture, and portable design. The transmitter architecture is capable of spectrally optimal pulse shapes while maintaining energy consumption comparable to existing rudimentary static-shape pulse generators. The proposed architecture optimizes energy efficiency by varying the number of phases supplied by an on-chip multiphase clock generator.;The dissertation begins by proposing a 100% digitally programmable, source-coupled multivibrator that is both practical and amenable to digital design. By requiring no passives, current sources, or bias voltages, the oscillator is easily integratable in digital DSM technology. The proposed multivibrator was experimentally verified in 65 nm bulk silicon CMOS technology using the STMicroelectronics toolkit. The oscillation frequency can be tuned using a digitally tuned 3-port varactor array and supply voltage scaling from 450 mV to 1.2 V. The proposed multivibrator achieves a wide frequency range of oscillation from 640 MHz to 6 GHz with a power consumption of 5 μW to 559 μW.;A multiphase clock generator consisting of eight coupled multivibrators achieves a FoM of -174.6 dB with as little as 798 μW at V DD = 733 mV. To the best of our knowledge, this is the first documented case of coupling more than two oscillators of this type. Energy-efficient gate-embedded level-converters used in the clock drivers and pulse polarity control can achieve a 0.24 J·s Energy Delay Product (EDP). This method outperforms conventional level conversion during simulations of a serial bus with data rates of 1 Gbps and 4 Gbps.;An algorithm is introduced that involves solving Semi-Definite Programming (SDP) and Binary Integer Programming (BIP) problems to formulate a signature that will invoke the transmission of a pulse that optimally utilizes the bandwidth. The signature is supplied to parallel pseudorandom number generators or Ring Generators (RGs) which output the encoded waveform to the Time-Interleaved Digital-to-Analog Converter (TIDAC). The reconfigurable RG is responsible for on-chip pulse shaping consumes 185.87 μW at 1 GHz with V DD = 750 mV.
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