Designing low-power and high-performance digital circuits with carbon nanotube transistors.

摘要

I have studied the use of carbon nanotube based field effect transistors (CNFETs) in high performance as well as low power digital VLSI systems. Analytical as well as numerical models of CNFETs have been developed and used in evaluating the performance-power trade-offs of CNFET based digital systems. Novel design techniques (e.g., multi-valued logic) have been proposed as possible supplements to the more traditional CMOS design style. A rigorous numerical study on the role of variations in CNT arrays show that an increased array density and the removal of all the metallic tubes are necessary for realizing practical CNFETs. Finally, tunneling CNFETs have also been investigated and shown to hold enormous promise for ultralow power VLSI design, both as computational elements and also for power gating in Si based systems.