封面
英文摘要
声明
答辩决议书
中文摘要
目录
Chapter 1 Introduction
1.1 Electronic Design Automation and Logic Synthesis
1.2 Two Emerging Technologies in Focus
1.3 Organization of the Thesis
Chapter 2 BDD-Based Synthesis of Single-Electron Transistor Array
2.1 Background and Related Works
2.2 Technical-Constraint-Free Mapping
2.3 Mapping under the Technical Constraints
2.4 Experimental Results
2.5 Summary
Chapter 3 A General Design of Stochastic Circuits
3.1 Background and Related Works
3.2 Proposed Design
3.3 Synthesis of Multi-linear Polynomial
3.4 Synthesis of General Polynomial
3.5 Experimental Results
3.6 Summary
Chapter 4 Conclusion
4.1 Contributions
4.2 Future Work
致谢
Appendix A Correctness Proof of the SET Mapping Algorithms
A .1 Correctness of Constraint-Free Mapping
A .2 Correctness of Expanded Network
Appendix B Proof of the Equivalence of BCP and MLP Representation
Appendix C Publications
参考文献
上海交通大学;