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A new method of evolving hardware design based on IIC bus and AT24C02

机译:基于IIC总线和AT24C02的硬件设计演进新方法

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A new method of evolving hardware design based on I2C bus and AT24C02 is presented in this paper. This method has expanded the application of I2C-bus, it is implemented on A FPGA/ SOPC by using I2C-bus and T24C02 to simulated I2C-bus transmission timing, it change the method of evolving hardware design by using I2C-bus and AT24C02 but not using evolutionary algorithm, overcome the disadvantage of long time of the traditional method, and achieve a fast, high efficiency and higher accuracy I2C interface design techniques. The experiments show that the circuits evolved by using this new method based on I2C-bus andAT24C02 communication interface can save transmission time, increase the bus utilization, and has achieved good results.
机译:提出了一种基于I2C总线和AT24C02的硬件设计演进新方法。该方法扩展了I2C总线的应用范围,它通过使用I2C总线和T24C02在FPGA / SOPC上实现,以模拟I2C总线的传输时序,改变了使用I2C总线和AT24C02进行硬件设计的方法,但是不使用进化算法,克服了传统方法时间长的缺点,并实现了快速,高效,高精度的I2C接口设计技术。实验表明,采用这种新方法开发的基于I2C总线和AT24C02通信接口的电路可以节省传输时间,提高总线利用率,并取得了良好的效果。

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