首页> 外文会议>VLSI Technology (VLSIT), 2012 Symposium on >A New Metal Control Gate Last process (MCGL process) for high performance DC-SF (Dual Control gate with Surrounding Floating gate) 3D NAND flash memory
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A New Metal Control Gate Last process (MCGL process) for high performance DC-SF (Dual Control gate with Surrounding Floating gate) 3D NAND flash memory

机译:用于高性能DC-SF(带环绕浮栅的双控制门)3D NAND闪存的新型金属控制栅极后处理(MCGL工艺)

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摘要

A new Metal Control Gate Last process (MCGL process) has been successfully developed for the DC-SF (Dual Control gate with Surrounding Floating gate cell)[1] three-dimensional (3D) NAND flash memory. The MCGL process can realize a low resistive tungsten (W) metal word-line with high-k IPD, a low damage on tunnel oxide/IPD, and a preferable FG shape. And also, a conventional bulk erase can be used, replaced GIDL erase in BiCS[3][4], due to direct connection between channel poly and p-well by the channel contact holes. Therefore, by using MCGL process, high performance and high reliability of DC-SF cell can be achieved for MLC/TLC 256Gb/512Gb 3D NAND flash memories.
机译:已经成功为DC-SF(具有环绕浮动栅单元的双控制栅)[1]三维(3D)NAND闪存开发了一种新的金属控制栅最后工艺(MCGL工艺)。 MCGL工艺可以实现具有高k IPD的低电阻钨(W)金属字线,对隧道氧化物/ IPD的损伤小,并且具有较好的FG形状。而且,由于沟道多晶硅和p阱之间通过沟道接触孔直接连接,因此可以使用传统的体擦除技术代替BiCS [3] [4]中的GIDL擦除技术。因此,通过使用MCGL工艺,可以为MLC / TLC 256Gb / 512Gb 3D NAND闪存实现DC-SF单元的高性能和高可靠性。

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