首页> 外文会议>VLSI Design, Automation and Test, 2009. VLSI-DAT '09 >Design of high-speed errors-and-erasures Reed-Solomon decoders for multi-mode applications
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Design of high-speed errors-and-erasures Reed-Solomon decoders for multi-mode applications

机译:用于多模式应用的高速误差和擦除的Reed-Solomon解码器设计

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A multi-mode Reed-Solomon (RS) decoder design based on the reformulated inversionless Berlekamp-Massey (riBM) algorithm is proposed to correct both errors and erasures for any RS code including shortened codes. Without degrading the resulting performance, we effectively improve the hardware utilization of decoder and simplify the routing network in conventional multi-mode decoder design. With the developed multi-mode arrangement, the proposed decoder possesses not only high-performance property but also simple and regular interconnect topology, making the decoder suitable for VLSI realization. Experimental results reveal that for code words of length n les 255 with nu errors and rho erasures correcting capability, 0les 2nu+rho les 16, the achievable throughput rate of the proposed decoder, implemented in TSMC 0.13mum 1P8M process, is 4Gbps at a maximum operating clock of 450MHz and the total gate count is 50K.
机译:提出了一种基于重新构造的无逆Berlekamp-Massey(riBM)算法的多模式Reed-Solomon(RS)解码器设计,以纠正包括缩短码在内的任何RS码的错误和擦除。在不降低最终性能的情况下,我们有效地提高了解码器的硬件利用率,并简化了常规多模式解码器设计中的路由网络。通过开发的多模式装置,所提出的解码器不仅具有高性能特性,而且具有简单而规则的互连拓扑,从而使该解码器适合于VLSI实现。实验结果表明,对于长度为nus 255且具有nu错误和rho纠错能力的代码字,0les 2nu + rho les 16,在TSMC 0.13mum 1P8M流程中实现的拟议解码器可达到的吞吐速率最大为4Gbps。工作时钟为450MHz,总门数为50K。

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