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Database Architecture Optimized for the new Bottleneck: Memory Access

机译:针对新瓶颈优化的数据库体系结构:内存访问

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In the past decade, advances in speed of commodity CPUs have for out-paced advances in memory latency. Main-memory access is therefore increasingly a performance bottleneck for many computer applications, including database systems. In this article, we use a simple scan test to show the severe impact of this bottleneck. The insights gained are translated into guidelines for database architecture; in terms of both data structures and algorithms. We discuss how vertically fragmented data structures optimize cache performance on sequential data access. We then focus on equi-join, typically a random-access operation, and introduce radix algorithms for partitioned hash-join. The performance of these algorithms is quantified using a detailed analytical model that incorporates memory access cost. Experiments that validate this model were performed on the Monet database system. We obtained exact statistics on events like TLB misses, L1 and L2 cache misses, by using hardware performance counters found in modern CPUs. Using our cost model, we show how the carefully tuned memory access pat tern of our radix algorithms make them perform well, which is confirmed by experimental results.
机译:在过去的十年中,商品CPU的速度提高已经超过了内存延迟。因此,对于许多计算机应用程序(包括数据库系统),主内存访问已日益成为性能瓶颈。在本文中,我们使用简单的扫描测试来显示此瓶颈的严重影响。获得的见解转化为数据库体系结构的准则;在数据结构和算法方面。我们讨论了垂直分段的数据结构如何优化顺序数据访问时的缓存性能。然后,我们将重点放在等值联接(通常是随机访问操作)上,并介绍用于分区哈希联接的基数算法。这些算法的性能使用包含内存访问成本的详细分析模型进行量化。在Monet数据库系统上进行了验证该模型的实验。通过使用现代CPU中发现的硬件性能计数器,我们获得了有关诸如TLB未命中,L1和L2高速缓存未命中等事件的准确统计信息。使用我们的成本模型,我们展示了我们的基数算法精心调整的内存访问模式如何使它们性能良好,这已被实验结果证实。

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