A performance driven hierarchical partitioning placement algorithm

摘要

A new hierarchical partitioning placement algorithm is presented.nThe objective function is formulated as a weighted sum of the total wirenlength and the maximum circuit delay. Special balancing rules are usednto assure a good balance between the numbers of components in thenregions. Total wire length and maximum circuit delay are estimated andnupdated efficiently at each step of the partitioning process.nExperimental results are very encouraging