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Compact THz Imaging Detector

机译:紧凑型THz成像探测器

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摘要

We describe preliminary design, modeling and test results for the development of a monolithic, high pixel density, THz band focal plane array (FPA) fabricated in a commercial CMOS process. Each pixel unit cell contains multiple individual THz band antennae that are coupled to independent amplifiers. The amplified signals are summed either coherently or incoherently to improve detection (SNR). The sensor is designed to operate at room temperature using passive or active illumination. In addition to the THz detector, a secondary array of Visible or SWIR context imaging pixels are interposed in the same area matrix. Multiple VIS/SWIR context pixels can be fabricated within the THz pixel unit cell. This provides simultaneous, registered context imagery and "Pan sharpening" MTF enhancement for the THz image. The compact THz imaging system maximizes the utility of a ~ 300 μm × 300 μm pixel area associated with the optical resolution spot size for a THz imaging system operating at a nominal ~ 1.0 THz spectral frequency. RF modeling is used to parameterize the antenna array design for optimal response at the THz frequencies of interest. The quarter-wave strip balanced bow-tie antennae are optimized based on the semiconductor fabrication technology thin-film characteristics and the CMOS detector input impedance. RF SPICE models enhanced for THz frequencies are used to evaluate the predicted CMOS detector performance and optimal unit cell design architecture. The models are validated through testing of existing CMOS ROICs with calibrated THz sources.
机译:我们描述了在商业CMOS工艺中制造的整体式,高像素密度,太赫兹频带焦平面阵列(FPA)的开发的初步设计,建模和测试结果。每个像素单位单元包含耦合到独立放大器的多个单独的THz频带天线。将已放大的信号相干或不相干地相加,以提高检测(SNR)。该传感器设计为在室温下使用被动或主动照明进行操作。除THz检测器外,可见或SWIR上下文成像像素的辅助阵列也插入同一面积矩阵中。可以在THz像素单位单元内制造多个VIS / SWIR上下文像素。这为THz图像提供了同步的配准上下文图像和“平底锅锐化” MTF增强功能。紧凑的太赫兹成像系统最大程度地利用了〜300μm×300μm像素面积,与以标称〜1.0 THz频谱频率工作的太赫兹成像系统的光学分辨率光斑大小相关。 RF建模用于参数化天线阵列设计,以在感兴趣的THz频率获得最佳响应。根据半导体制造技术的薄膜特性和CMOS检测器输入阻抗优化了四分之一波带状平衡领结天线。针对THz频率增强的RF SPICE模型用于评估预测的CMOS检测器性能和最佳的晶胞设计架构。这些模型通过使用校准的THz源测试现有CMOS ROIC来验证。

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