In an ideal world, all test vectors selected as I_(DDQ) test vectors would have very low measurement current. In many circumstances, however, a complete set of tests cannot be defined when relying on zero-current considerations. I_(DDQ) test vectors selected from existing test sets must be capable of compensating for passive currents. The identification of valid test vectors, and the magnitude of the passive current, can be predicted in the ASIC environment via macrocell-specific information. This paper presents one methodology to support this test generation using digital simulation, including the selection of multiple I_(DDQ) test vectors.
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