A HIERARCHICAL, DESIGN-FOR-TESTABILITY (DFT) METHODOLOGY FOR THE RAPID PROTOTYPING OF APPLICATION-SPECIFIC SIGNAL PROCESSORS (RASSP)

摘要

This paper describes a highly automated, hierarchical, de-sign-for-testability process that spans the entire life cycle. Lockheed Martin's Advanced Technology Laboratories and Self-Test Services developed this process for the DoD's RASSP program, and it contributes significantly to the RASSP goals of 4x improvement in cycle time, design quality, and life-cycle costs.