A Hardware Implementation of Evolvable Embedded System for Combinational Logic Circuits Using Virtex 6 FPGA

摘要

The concept of the evolvable embedded systems is introduced through this paper which could provide automation of complex circuits like filters, fault tolerance circuits, and adaptive circuits. The complete evolvable hardware process can be conceptualized in a single FPGA, in which evaluation and evolution are performed in parallel in the same FPGA. The MicroBlaze soft processor is used for the computation of genetic algorithm and communication link between the PC and FPGA system. Optimized utilization of FPGA resources was created by selecting optional peripherals for the CPU. The computation of the GA program in the processor has speeded up the evaluation process compared to the conventional use of evaluating through the PC. The evaluation time could still be accelerated up by programming the FPGA through a Compact Flash card rather than a JTAG cable. Here, the bitstreams are stored on a Compact Flash and interconnected to the processor using the SysACE peripheral.