IASSim: A Programmable Emulator for the Princeton IAS/Von Neumann Machine

摘要

In this paper, we describe a programmable emulator for the Princeton IAS/Von Neumann machine. The emulator is historically accurate, preserving the quirks and eccentricities of the machine. It is also user-friendly and robust, suitable for undergraduate architecture and programming classes as a teaching tool. Users can write non-trivial programs in IAS assembly code or machine code. We present some examples here, and discuss assignments from its first use in two undergraduate classes. IASSim is a Java application publicly available at no cost.