The VHSIC (Very High Speed Integrated Circuits) program has been initiated by the Department of Defense (DoD) to advance the hardware technology in the area of integrated circuits. Chips with a 1.25-micron feature size have been developed as a part of this program, and chips with a 0.5-micron feature will be developed in the next stage. VHDL (VHSIC Hardware Description Language) is being developed to reduce the time and cost of utilizing VHSIC technology in military systems. VHDL will provide a standard medium for communicating digital design data among defense contractors, and between contractors and the DoD.
rnThe VHDL requirements are based on a workshop organized by the Institute for Defense Analysis in the summer of 1981. Representatives of the government, industry, and the academic community attended this workshop. As a result of a subsequent competitive government procurement, the team of Intermetrics, Texas Instruments, and IBM was awarded a contract to design and implement VHDL and its support environment. The language presented in this session is the result of this team effort which started on July 31, 1983, and will result in the delivery in December of 1985 of the language, as well as a hardware design support environment.
美国国防部(DoD)发起了VHSIC(超高速集成电路)计划,以推进集成电路领域的硬件技术。此程序的一部分已开发出具有1.25微米特征尺寸的芯片,下一阶段还将开发出具有0.5微米特征的芯片。正在开发VHDL(VHSIC硬件描述语言)以减少在军事系统中使用VHSIC技术的时间和成本。 VHDL将提供一种用于在国防承包商之间以及承包商与国防部之间传达数字设计数据的标准介质。 P> rn
VHDL要求基于1981年夏季由国防分析研究所组织的研讨会政府,工业界和学术界的代表参加了这次研讨会。由于政府随后的竞争性采购,Intermetrics,Texas Instruments和IBM的团队获得了设计和实施VHDL及其支持环境的合同。本次会议使用的语言是该团队于1983年7月31日开始的努力的结果,并将在1985年12月交付该语言以及硬件设计支持环境。 P>
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