The design and analysis of a 5-level cascaded voltage source inverter with low THD

摘要

Multilevel inverters have been important devices developed in recent years, owing to their capability to increase the voltage and power delivered to the load. Researches done based on basic inverter topologies show that, multilevel inverters have many advantages such as low power dissipation on power switches, low harmonic and low electromagnetic interference (EMI) outputs. A modified sinusoidal pulse width modulation (SPWM) modulator that reduces output harmonics is presented in this paper. The proposed modulation technique can be easily applied to any multilevel inverter topology carrying out the necessary calculations. The most common multilevel inverter topologies have been studied to define the best topology for SPWM modulation strategy. It is seen that cascaded H-bridges are the most convenient solution. The cascaded H-bridge cells have been constituted by IGBT semiconductors, and switched by the proposed 24-channel SPWM modulator to obtain 5-level output at the back-end of the 3-phase voltage source inverter (VSI). The designed H-bridge cells have a strong switching bandwidth up to 40 KHz, owing to its robustly designed modulator block. The proposed VSI in this paper also has a total harmonic distortion ratio of output current (THDi) around at 0.1% without requiring any filtering circuit. The harmonic analysis of proposed design has been executed under several working conditions such as various switching frequencies and modulation indexes. The detailed comparisons have been performed to determine the best working conditions of VSI and presented in this paper.