Univ. of Minnesota, Minneapolis, MN;
multiprocessing systems; parallel processing; parallelising compilers; program control structures; TLS execution model; Thread-Level Speculation; Transactional Memory; complex control flow; computer industry; multicore architectures; multithreaded architectures; optimal loop selection; parallel threads; parallelizing compilers; profile-driven TLS compiler; single-program performance; speculative parallelism; speculative threads;
机译:探索SPLASH2中的推测性过程和循环级并行性
机译:Puncalc:在电子表格中基于任务的并行性和投机重新评估
机译:Splay线程合作在投机并行性和GPGPU中作为负载均衡技术进行射线跟踪
机译:探索SPEC2006的投机平行
机译:粗粒度的推测并行性和优化。
机译:审查共感染的投机作用
机译:探索spEC2006中的推测并行性