A CMOS-array-computer with on-chip communication hardware developedfor massively parallel applications

摘要

The authors present a scalable MIMD computer system which wasndesigned to be used as neurocomputer. It is capable of emulatingndifferent types of neurons, including complex biologically motivatednmodels based on activity pulses, variable pulse transmission times, andnmultiple threshold learning rules. It is constructed as an arraynconsisting of nodal computer chips, each containing an on-chipncommunication processor to realize a full global communication. Hence,nnot only neural networks featuring arbitrary topologies can be built,nbut also a wide range of nonneural processing applications can benimplemented. As an example, the authors show how to use the system innsolving optimization problems using genetic algorithms, and how tonprogram it for real-time image processing using a combination of neuralnnets, genetic algorithms, and classical image processingntechniques