Failures in Physical Vapor Deposition Aluminum Plugs due to Hydrogen Anneal and Final Test Bake Process Steps

摘要

The manufacturing of some sub-micron devices st 11 uses Physical Vapor Deposition (PVD) of AlCu (0.5%) plugs for top vias and interconnect lines. This paper describes the generation of voids in the AlCu via plugs during the anneal steps at the end of the wafer fabrication process. The failure mechanism is due to the induced stress during both the hydrogen anneal and the 48 hour final bake step (data retention test). During these processes the metal stress level shifts from tensile to compressive, causing diffusional creep along the metal grain boundaries, together with segregation of Al_2Cu precipitates near to the metal oxide interface. Upon cooling, the metal stress returns to a tensile state, which induces void formation in the AlCu plugs (Figure 1); the latter results in high via resistance values causing electrical failures. During this study, the impact of different factors such as lower via critical dimensions (CD's), hicker ILD, irregular via profiles due to the etch step and wafer storage bake temperatures, are reviewed. FIB, SEM, EDX and TEM analyses were performed for the failure structures, to understand copper segregation problems in the AlCu via plugs. A few experiments were also performed with different hydrogen anneal temperatures and reduced final bake test times. This paper includes multiple bake test results which were perrformed to understand the impact of Al_2Cu solubility on the thick aluminum interconnect lines.