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Reducing the Gap between Verification Models and Software Development Models

机译:减少验证模型和软件开发模型之间的差距

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A variety of models and notations are available to support the software developers. Such models help to gather requirements and to build a system implementing these requirements. However, it is often neglected to verify that the requirements are actually fulfilled in the design and implementation. The increasing demand for compliancy to requirements (e.g. due to laws) together with the increasing system complexity re-attracts notice to automatic verification technologies for that purpose. The low user-friendliness and, thus, the low applicability of the verification technologies often prevents their employment. In this paper we aim at closing the gap between software development models with their rich notation and semantics (e.g. Event Process Chains, EPCs) on the one hand and verification-oriented models (typically just simple structures like finite state automata) on the other hand. This is approached by extending the verification model in a controlled manner towards more semantics resulting in our extended Kripke structure. To profit from such a semantic extension we, in addition, extend the temporal logic language CTL. Our new temporal logic language allows to express the expected requirements more precisely.
机译:可以使用各种模型和符号来支持软件开发人员。这样的模型有助于收集需求并构建实现这些需求的系统。但是,通常忽略了在设计和实现中验证要求是否真正满足。对合规性要求的增加(例如由于法律原因)以及系统复杂性的增加重新吸引了为此目的的自动验证技术的注意。低用户友好性以及因此验证技术的低适用性经常阻止其使用。在本文中,我们旨在通过一方面丰富的符号和语义(例如事件处理链,EPC)和另一方面面向验证的模型(通常是诸如有限状态自动机之类的简单结构)来缩小软件开发模型之间的差距。 。这是通过以一种可控的方式将验证模型扩展到更多语义上而实现的,从而扩展了我们的Kripke结构。为了从这种语义扩展中受益,我们还扩展了时态逻辑语言CTL。我们新的时间逻辑语言可以更精确地表达预期的要求。

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