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Fast Squaring Technique for Radix Vicinity Numbers for Radix 2~n ± M with Reduced Computational Complexity

机译:降低计算复杂度的2〜n±M基数的基数快速平方技术

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摘要

A fast squaring technique for the operands nearer to a particular radix is reported in this paper. The technique offers significantly less computational complexity which reduces the processing time to a large extent. Considering the applicability of the technique for a particular set of numbers which are in the vicinity of the corresponding radix, it is shown that the technique is equally acceptable for very large radix number. The proposed approach has been verified using Xilinx ISE Vertex-7 FPGA device. Simulated findings showed that with a significant increment in radix value (99.87%), the change of propagation delay is extremely small (2.33%), and corresponding increase in power dissipation is within tolerable range (29.84%). The results show the improvement in speed and computational complexity.
机译:本文报道了一种针对较接近特定基数的操作数的快速平方技术。该技术显着减少了计算复杂度,从而在很大程度上减少了处理时间。考虑到该技术对对应基数附近的一组特定数字的适用性,表明该技术对于非常大的基数也同样可以接受。使用Xilinx ISE Vertex-7 FPGA器件已验证了所提出的方法。模拟结果表明,随着基值的显着增加(99.87%),传播延迟的变化非常小(2.33%),相应的功耗增加在可容忍的范围内(29.84%)。结果显示出速度和计算复杂度的提高。

著录项

  • 来源
  • 会议地点 Ranchi(IN)
  • 作者单位

    Department of Electronics and Communication Engineering, JIS College of Engineering, Kalyani, India;

    Department of Electronics and Communication Engineering, RCC Institute of Information Technology, Kolkata, India;

    Department of Electronics and Communication Engineering, JIS College of Engineering, Kalyani, India;

    Department of Electronics and Communication Engineering, Kalyani Government Engineering College, Kolkata, India;

  • 会议组织
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Squaring; Vicinity; Radix; FPGA;

    机译:平方;附近;基数;现场可编程门阵列;

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