首页> 外文会议>International Conference on Imaging, Signal Processing and Communication >The Design of Discrete Memory-Accessing Library of Unstructured-grid for Domestic Heterogeneous Many-Core Architecture
【24h】

The Design of Discrete Memory-Accessing Library of Unstructured-grid for Domestic Heterogeneous Many-Core Architecture

机译:国内异构多核架构非结构化网格的离散记忆 - 访问库设计

获取原文

摘要

Based on the “SunWay TaihuLight” system, it designs high performance batch-processing algorithm of unstructured-grid discreted accessing memory, which is suitable for different application scenarios. This method uses coordinate preprocessing technology to improve the bandwidth utilization of the slave core on-chip array by establishing a grouped message queue model, and uses barrier-free data distribution technology to make full used of the network performance of the domestic heterogeneous many-core architecture. Through testing different types of applications and combining performance models and experimental results to verify, it is found that the average effective memory bandwidth utilization of the algorithm is more than 70% under different grid models and scales, which is an average of 10 times and the highest performance acceleration is of up to 45 times compared with the master-core serial algorithm. The test and analysis of the application in many different fields have proved the universality of the algorithm, and though a large number of experimental results show that the algorithm has good acceleration performance for different grid types and scales in different application fields.
机译:基于“Sunway Toinghulight”系统,它设计了非结构化网格离散访问存储器的高性能批量处理算法,适用于不同的应用场景。该方法使用坐标预处理技术来通过建立分组的消息队列模型来提高从属芯片上阵列的带宽利用率,并使用无障碍数据分配技术充分利用国内异质多核的网络性能建筑学。通过测试不同类型的应用和组合性能模型和实验结果来验证,发现算法的平均有效内存带宽利用率超过70%,在不同的网格模型和尺度下,平均值为10次与主核心串行算法相比,最高性能加速度高达45次。许多不同领域的应用的测试和分析证明了算法的普遍性,尽管大量的实验结果表明,该算法在不同的网格类型和不同应用领域中具有良好的加速性能。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号