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DNN+NeuroSim: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators with Versatile Device Technologies

机译:DNN + NeuroSim:具有多功能设备技术的内部内存加速器的端到端基准框架

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DNN+NeuroSim is an integrated framework to benchmark compute-in-memory (CIM) accelerators for deep neural networks, with hierarchical design options from device-level, to circuit-level and up to algorithm-level. A python wrapper is developed to interface NeuroSim with popular machine learning platforms such as Pytorch and Tensorflow. The framework supports automatic algorithm to hardware mapping, and evaluates both chip-level performance and inference accuracy with hardware constraints. In this work, we analyze the impact of reliability in "analog" synaptic devices, and analog-to-digital converter (ADC) quantization effects on the inference accuracy. Then we benchmark CIM accelerators based on SRAM and versatile emerging devices including RRAM, PCM, FeFET and ECRAM, from VGG to ResNet, and from CIFAR to ImageNet dataset, revealing the benefits of high on-state resistance, e.g. by using three-terminal synapses. The open-source code of DNN+NeuroSim is available at https://github.com/neurosim/DNN_NeuroSim_V1.0.
机译:DNN + NeuroSim是一个集成框架,用于基于深度神经网络的基准计算内存(CIM)加速器,具有从设备级别的分层设计选项,到电路级和算法级别。开发了一个Python包装器,以与Pytorch和Tensorflow等流行的机器学习平台界面接口神经疏松症。该框架支持自动算法到硬件映射,并使用硬件约束评估芯片级性能和推理准确性。在这项工作中,我们分析了“模拟”突触装置的可靠性的影响,以及对推理精度的模数转换器(ADC)量化效应。然后,我们基于SRAM和多功能新兴设备基于SRAM和多功能的新兴设备,包括RRAM,PCM,FEFET和ECRAM,从VGG到VERENET,以及从CIFAR到Imagenet数据集,揭示了高通态电阻的好处,例如,通过使用三终端突触。 DNN +神经孢子的开源代码可在HTTPS://github.com/neurosim/dnn_neurosim_v1.0获得。

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