An 80 nm dual-gate CMOS with shallow extensions formed after activation annealing and SALICIDE

摘要

Silicide compatible process flows for dual-gate CMOS with shallow extensions formed after activation annealing and Co SALICIDE (SEFAS) are proposed and adopted for 80 nm physical gate length CMOS. They show good DC and AC performances while keeping high reliability because of successful shallow extension formation. High f/sub T/ values of 80 GHz for NMOS and 47 GHz for PMOS are achieved.