A Systematic Failure Analysis Approach to Determine True Electrical Overstress Failures on Integrated Circuits

摘要

Root cause determination of electrical overstress (EOS) failures has become significantly important because of the automotive industry's continual quest for quality improvement. The determination of EOS as the failure type in a defective IC is important, but incomplete without accurately attributing the failure to a root cause such as a design flaw, manufacturing defect or exposure to electrical stresses beyond the recommended operating conditions. Further improvement in outgoing quality depends on an efficient and effective failure analysis process to distinguish between units that fail due to EOS events, where recommended operating limits are exceeded, and units that fail due to a latent defect. This paper presents a systematic approach to failure analysis of EOS that accurately determines failure root cause. Case studies are presented that illustrate the process and resulting root cause conclusions that enable implementation of appropriate corrective actions.