Low-Power Area-Efficient 8-bit Coarse-Fine Resistor-String DAC

摘要

This paper presents low-power area efficient 8-bit 500 kS/s Coarse-Fine Resistor-String Digital to Analog Converter (CFRS-DAC). Coarse-Fine structure in the proposed DAC reduces unit resistors as compare with the conventional R-string DAC. Proposed DAC reduces unit resistors to 28 % and 70 % of inverted-ladder DAC and Conversional R-string DAC, respectively. Class-B Opamp buffer is used to reduce the offset errors and power consumption. The proposed structure shows an Effective Number of Bits (ENOB) of 7.917 bits, Signal to Noise Ratio (SNR) of 49.42 dB, and Spurious Free Dynamic Range (SFDR) of 56.79 dB at post-layout simulation level. Static performance results shows that Max. Differential Nonlinearity (DNL) is 0.004 LSB and Max. Integral Nonlinearity (INL) is 0.024 LSB. It consumes $65.23 mu mathrm{W}$ with supply voltage of 3.3 V and it has an active area of 0.0297 mm^2.