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A power management unit integrated ADSL/ADSL2+ CPE analog front-end with ?93.5dB THD for DMT-based applications

机译:用于DMT的应用程序的电源管理单元集成ADSL / ADSL2 + CPE模拟前端,用于DMT应用程序的93.5dB THD

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This paper presents a high linear analog front-end (AFE) for ADSL/ADSL2+ system applications. This AFE has the overall linearity of -93.5dB to ensure the ADSL/ADSL2+ modem to achieve up to 27.2Mbps down-stream data-rate on short loops. The AFE is implemented in two chips using 0.11um/55nm CMOS process with integrated power management unit (PMU) to optimize the data-rate, die area and power efficiency. The choice of the process is a compromise between the size of the digital circuits, and the analog performance and cost. Furthermore, a 90dB dynamic range (DR) CTSDM ADC is employed to relax the requirement of the front-end filters of the receiver, and thus the filter orders are reduced as well as the area and power consumption. The transmit path can achieve 90dB SNR and -95.2dB THD. The receive path can achieve 82.1dB SNR and -93.5dB THD. The AFE including line driver using the dual-chip solution dissipates 590 mW from 3.3V/5 V supply.
机译:本文介绍了ADSL / ADSL2 +系统应用的高线性模拟前端(AFE)。该AFE具有-93.5dB的整体线性度,可确保ADSL / ADSL2 +调制解调器在短路上实现高达27.2Mbps的下游数据速率。 AFE使用0.11um / 55nm CMOS工艺在两个芯片中实现,具有集成电源管理单元(PMU),以优化数据速率,模具区域和功率效率。该过程的选择是数字电路尺寸和模拟性能和成本之间的折衷。此外,采用90dB动态范围(DR)CTSDM ADC来放宽接收器的前端滤波器的要求,因此过滤器订单减少以及面积和功耗。发射路径可以实现90dB SNR和-95.2DB THD。接收路径可以实现82.1db snr和-93.5db thd。使用双芯片溶液的线驱动器包括线路驱动器,从3.3V / 5 V供电耗散590 MW。

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