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A robust embedded ladder-oxide/Cu multilevel interconnect technology for 0.13μm CMOS generation

机译:一种强大的嵌入式梯形氧化物/ Cu多级互连技术,适用于0.13μm的CMOS产生

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摘要

A robust embedded Ladder-oxide(k=2.9)/Cu multilevel interconnect is demonstrated for 0.13 μm CMOS generation. A stable ladder-oxide IMD is integrated into the Cu metallization with minimum wiring pitch of 0.34 μm, and a single damascene (S/D) Cu-plug structure is applied. An 18 % reduction in wiring capacitance is obtained compared with SiO{sub}2 IMD. The stress- migration lifetime of vias on wide metals for S/D Cu-plug structure is much longer than dual damascene (D/D). The reliability test results such as electromigration (EM), TDDB of Cu interconnect, and pressure cooker test (PCT) are quite acceptable. Moreover, high flexibility in thermal design and packaging is obtained.
机译:稳健的嵌入梯形氧化物(K = 2.9)/ Cu多级互连被证明为0.13μmCMOS产生。将稳定的梯形氧化物IMD集成到Cu金属化中,最小布线间距为0.34μm,施加单个镶嵌(S / D)Cu-塞结构。与SIO {SUB} 2 IMD相比,获得了18%的布线电容减小。 S / D Cu-inp结构的宽金属上的通孔的应力迁移寿命远大于双镶嵌(D / D)。可靠性测试结果,例如电迁移(EM),Cu互连的TDD,以及压力炊具测试(PCT)是非常可接受的。此外,获得了热设计和包装的高柔韧性。

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