Comparison of Software-Based vs. Hardware-Accelerated AES-128 Encryption Algorithm for Secure Communication with Nanosatellites

摘要

Security of the onboard systems is mandatory to prevent exploitation of any nanosatellite's control systems against unauthorized access with fatal consequences. A strong encryption scheme is needed for the security of the payload information of nanosatellite RVSAT-1 that consists of data generated from the onboard microbiological experiment. AES-128 encryption standard is an example of one such strong encryption scheme, which requires a huge amount of time and computation power in order to be cracked and hence enhances the security of the data transmitted from the nanosatellite. The paper describes the use of Hardware Accelerators specialized for real-time encryption of data as opposed to the use of Software implementation, and a comparison between Software-based vs. Hardware-accelerated encryption by the implementation of AES-128 encryption standard. A graphical trade-off study between encryption speedup, power consumed and throughput using both software-based and hardware-accelerated encryption techniques is depicted. The experiment is conducted using an integrated hardware accelerator for encryption, integrated into the onboard microcontroller. This is supposed to act as an additional microcontroller for the Telemetry. Tracking, and Command (TT&C) subsystem of RVSAT-1. Results of the aforementioned graphical comparison represent a 95.8% performance boost in encryption accompanied by a decrement of 62.54% in the power consumption and a decrease of 30% in the average memory usage when Hardware Accelerator was used as compared to Software implementation.