A positive and negative dual rail voltage supply proposed for battery powered portable devices and a test chip designed and fabricated by using 0.13um CMOS triple-well process. Proposed dual voltage scheme provides an effective way of reducing the dynamic power consumption due to the charge recycling through the upper power rail and lower power rail separated by series connected capacitors. The additional advantage of the proposed system is that we can separate digital block and analog block depending on the requirement of operating speed and voltage swing levels.
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