A new approach is presented for macrocell placement using an analogy with annealing in solids as the framework for optimization. The proposed method is an iterative improvement scheme which generates a chain of configurations from an initial configuration obtained by force-directed relaxation. It has the ability to avoid being trapped in a local minimum. All geometrical aspects such as shape, size and orientation of the circuit modules are considered simultaneously in each iteration step. Two benchmark examples with 10 and 33 blocks respectively are given to demonstrate the performance of the strategy.
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