Analysis and design of mixed signal oscilloscope for jitter reduction

摘要

This paper presents a 12.5-Gb/s on-chip oscilloscope (OCO) circuit to measure eye diagrams and jitter histograms of high-speed digital signals. The proposed circuit adopts a novel architecture to capture both single-ended and differential signals. In addition, it is capable of measuring the eye openings and jitter of the input signals without the need to construct the whole eye diagram which makes it a suitable candidate for eye opening monitor circuits. An asynchronous sampling technique and an efficient algorithm are employed in this research to decrease the area of the OCO as well as its processing time. The proposed circuit is fabricated in a 65-nm CMOS technology and the measurement results show sub-Pico second resolution when the input signals consist of a 10-GHz clock signal and a 12.5 GB/spseudorandom binary sequence. The OCO circuit has a power consumption of 1.9 m W, and its core area is 40 × 60 μm.