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Implementation of FIR Digital Filter on FPGA

机译:FPGA对FIR数字滤波器的实现

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摘要

Most of the industries use filtering methods in many fields like telecommunications, biomedical, signal processing and testing etc. Many techniques are available for use in analog as well as digital domains. The important part is to use the techniques which give us high speed and minimum distortion. The work presented in this paper focuses to remove unwanted noise from a 6us pulse wave generated in high energy Medical Linear Accelerators developed for treatment of cancer. As a prototype, pulse wave of 6us is first generated using NI (National Instruments) Multisim software and is also tested in MATLAB and LabView. VHDL (Very High-Speed Integrated Circuit Hardware Description Language) code is then generated for Lowpass Digital FIR (Finite Impulse Response) filter using MATLAB FDATool which gives similar response as that of Bessel filter. The filter is implemented on Spartan 3A XC3S700A series FPGA (Field Programmable Gate Array) and simulated with the help of ISE (Integrated Software Environment) Xilinx (v14.7) software to generate FPGA response. It was observed that FPGAs provide edge in digital filtering process over other techniques in terms of cost effectiveness, design flexibility, high performance and low power consumption in real time implementations.
机译:大多数行业使用电信,生物医学,信号处理和测试等许多领域的过滤方法许多技术可用于模拟以及数字域。重要的部分是使用提供高速和最小失真的技术。本文所呈现的工作侧重于从为治疗癌症的高能医疗线性加速器中产生的6US脉冲波中消除了不需要的噪声。作为原型,首先使用NI(NITINAL INSTRUMENTS)MULTISIM软件生成6US的脉冲波,也在MATLAB和LabVIEW中进行测试。然后,使用MATLAB FDATOOL为低通数字FIR(有限脉冲响应)滤波器生成VHDL(非常高速集成电路硬件描述语言)代码,这给出了与Bessel滤波器类似的响应。过滤器在Spartan 3A XC3S700A系列FPGA(现场可编程门阵列)上实现,并根据ISE(集成软件环境)Xilinx(v14.7)软件的帮助模拟以生成FPGA响应。观察到,FPGA在实时实施方面的成本效益,设计灵活性,高性能和低功耗方面提供了数字过滤过程中的边缘。

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