Design of charge-pump phase locked loop in micro-inertial sensor

摘要

A charge-pump phase locked loop(CPPLL) is designed for high-precision and high-stability in micro-inertial system. In this CPPLL, D-flip-flops are used to eliminate dead phase-zone and current mirrors are designed to improve matching between charge and discharge of the charge-pump, besides, unit gain amplifiers are applied to suppress the charge sharing. The simulation result shows that the frequency stability achieves 0.186/10000, while the periodic jitter is 931.32ps.