A 1.44-mW 96-dB SNR Sigma-Delta modulator with low-power OPAMP

摘要

A high-precision, low-power Sigma-Delta modulator has been designed with SMIC 0.18-μm CMOS process. It adopts a third-order feed-forward architecture with zeros optimization technology which is more appropriate for low-power design. Feed-forward architecture reduces the modulator's sensitivity of the circuit non-idealities. Zeros optimization technology enhances the maximum signal to noise ratio (SNR) can be achieved, and a high performance low-power operational amplifier (op-amp) is designed to decrease the integrating leak. The modulator is implemented by fully-differential switched-capacitor (SC) circuit. Simulation result shows that a peak SNR of 96 dB is obtained for a 1 KHz signal bandwidth, while it consumes only 1.44mW from a 1.8V supply.