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A CORDIC-Sinusoidal Pulse Width Modulation Using Silterra 0.18 μm CMOS Technology

机译:使用Silterra0.18μmCMOS技术的Cordic-Sinusoid脉冲宽度调制

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This paper presents the implementation of back-end design and optimization for Sinusoidal Pulse Width Modulation (SPWM) generator using Silterra 0.18μm technology and it is based on CORDIC algorithm. The SPWM technique is used to control switches such as Insulated Gate Bipolar Transistor (IGBT) in major power electronics appliances such as the Single Phase Matrix Converter (SPMC). Synopsys tool is used to synthesize the Resistor Transistor Level (RTL) netlist written in Verilog Hardware Description language (HDL) and also to design and optimize the back-end layout design. The use of Coordinate Rotation Digital Computer (CORDIC) algorithm in the design of the SPWM generator, results in an area-efficient architecture for effective design implementing Silterra's 0.18μm CMOS technology.
机译:本文介绍了使用Silterra0.18μm技术的正弦脉冲宽度调制(SPWM)发电机的后端设计和优化的实现,基于CORDIC算法。 SPWM技术用于控制诸如单相矩阵转换器(SPMC)的主要功率电子设备中的绝缘栅双极晶体管(IGBT)等开关。 Synopsys工具用于合成以Verilog硬件描述语言(HDL)编写的电阻晶体管级(RTL)网列表,也可以设计和优化后端布局设计。使用坐标旋转数字计算机(CORDIC)算法在SPWM发生器设计中,导致面积有效设计的有效设计,实现Silterra的0.18μmCMOS技术。

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