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Evolvable Hardware Design of Digital Circuits Based on Adaptive Genetic Algorithm

机译:基于自适应遗传算法的数字电路不断变化的硬件设计

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Evolvable hardware (EHW) is a thriving area of research which uses the genetic algorithm (GA) to construct novel circuits without manual engineering. GA has been widely implemented using software but have not gained an appreciable edge because of the huge computation time involved and easy to fall into local optimum. This has been a major hindrance to real-time applications. In order to improve GA, this paper proposes an adaptive algorithm for adjusting the probability value of genetic operator, called adaptive genetic algorithm (AGA). Adding an elite strategy to the algorithm further accelerates the convergence speed of the algorithm. In addition, a complete hardware evolution system based on Field Programmable SoCs (FPSoCs) for design of digital circuits is developed. The experimental results show that the proposed algorithm can accelerate convergence, reduce the generation of evolutionary circuits, and increase the success rate of evolution.
机译:不断变化的硬件(EHW)是一种繁荣的研究领域,它使用遗传算法(GA)来构建没有手动工程的新电路。 GA已被软件广泛实现,但由于涉及巨大的计算时间和易于陷入本地最佳的巨大计算时,尚未获得明显的边缘。这是实时应用的主要障碍。为了改进Ga,本文提出了一种调整遗传算子概率值的自适应算法,称为自适应遗传算法(AGA)。将Elite策略添加到算法进一步加速了算法的收敛速度。此外,开发了一种基于现场可编程SOC(FPSOC)的完整硬件演进系统,用于数字电路设计。实验结果表明,该算法可以加速收敛,减少进化电路的产生,增加进化的成功率。

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