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DETECTION OF TIMING LOOP AND CLOCK SELECTION IN A SYNCHRONOUS ETHERNET NETWORK BASED ON HOP COUNT

机译:基于跳数的同步以太网网络定时环路和时钟选择的检测

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A Synchronous Ethernet Network consists of network element (NE) which recover clock from the underlying Ethernet PHY and the quality of clock is conveyed using Ethernet Synchronous Messaging Channel with QL information embedded in QL-TLV. This enables clock selection for the downstream node. This paper describes a method to detect Timing Loop in synchronous network by modifying the current clock selection algorithm by adding another TLV to ESMC. A new parameter 'hop count' define this new TLV which is incremented by '1' on each hop as the ESMC messages propagate on a synchronous ethernet network. This paper also shows the modified clock selection algorithm which each NEs uses to select the best available clock from a set of clocks. Also this paper captures the MTIE/TDEV graph for the frequency error/noise respectively with the proposed solution.
机译:同步以太网由网络元素(NE)组成,该网络元素(NE)从基础以太网PHY中恢复时钟,使用以太网同步消息通道使用具有QL-TLV的QL信息传达时钟的质量。这使得下游节点的时钟选择。本文介绍了一种通过将另一个TLV添加到ESMC来通过修改当前时钟选择算法来检测同步网络中的定时环路的方法。当ESMC消息传播在同步以太网上传播时,一个新的参数'跳数'定义这个新的TLV,在每跳上递增“1”。本文还示出了修改的时钟选择算法,每个NES用于从一组时钟选择最佳可用时钟。此外,本文分别捕获了频率误差/噪声的MTIE / TDEV图,提出的解决方案。

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