A Novel Approach to Eliminate Low Order Harmonics in Asymmetrical Multilevel Inverter

摘要

A major problem in conventional multilevel inverter is that an increase in power switches and dc sources to increase the level in output voltage leads to increased cost, losses and size of the inverter. To solve this problem, many new topologies with reduced number of switches and dc sources have been presented in literature. But, harmonic distortion in new multilevel inverter topologies still needs improvement. This paper unleashes a new idea to minimize the total harmonic distortion as well as low order harmonics in the output voltage. Here, a new multilevel inverter topology based on modified H-bridge inverter is used which requires less number of components as compared with traditional cascaded multilevel inverter (CMLI) for equal number of level in output voltage. In order to address above issues, in this article, the selective harmonic elimination technique is employed and the switching angles are calculated using Particle Swarm Optimization (PSO) method. Performance of the employed scheme has been evaluated using MATLAB based simulation for 31-level inverter. The promising nature of the performance projects that proposed modulation technique can be employed for minimizing the THD in output voltage for newly developed topologies.