FPGA-Based Novel Speech Enhancement System Using Microphone Activity Detector

摘要

In this paper, we have proposed field-programmable gate array (FPGA) based design and implementation of a novel speech enhancement system, which can work for a single microphone device as well as that of a dual microphone device providing background noise immunity. We proposed a microphone activity detector (MAD), which detects the presence of single or dual microphone scenario. After detecting the microphones, multiband spectral subtraction technique enhances the speech signal from different background noisy surrounds. We have implemented our proposed design in Spartan 6 LX45 FPGA using Xilinx system generator tools. The evaluation of the quality of speech of enhanced signal and its correctness of MAD to detect the single or dual microphone system implies that our proposed hardware can work as a proper embedded component for hardware-based execution for speech enhancement.