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A Real-Time Embedded Heterogeneous GPU/FPGA Parallel System for Radar Signal Processing

机译:用于雷达信号处理的实时嵌入式非均质GPU / FPGA并联系统

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During the last decade, computing accelerated with graphics processing units (GPUs) have attracted the attention of signal processing engineers because of the enormous computational power and energy-efficiency of GPUs. A lot of signal processing applications, and in particular those related to modern radars, have benefited from this technology. However, the bottlenecks of GPU-computing - the relatively slow data transfer to the GPU memory and the large size of the data chunks which have to be fed into the GPU in order for it to attain its maximum computational performance, still restrict the potential use of the technology in some areas. In radar signal processing, both these issues have to be addressed, as the needed throughput can be extremely large and the data cannot be processed in arbitrary big chunks because of the relatively small processing latency required. In the paper, a heterogeneous radar processor consisting of FPGA and GPU devices is proposed and its model implementation is described. The presented performance analyses show that the primary design requirements - high data through-put, high overall computational performance and low latency, are met. The first is achieved with the help of a Remote Direct Memory Access (RDMA) mechanism, the second by employing Compute Unified Device Architecture (CUDA) technology, and the last by applying state of the art programming techniques and establishing a latency/performance trade-off satisfying the given design constraints.
机译:在过去十年中,由于GPU的巨大计算能力和节能,计算加速了与图形处理单元(GPU)加速的计算引起了信号处理工程师的注意力。很多信号处理应用,特别是那些与现代雷达有关的信号,从而受益于此技术。但是,GPU计算的瓶颈 - 对GPU内存的相对较慢的数据传输以及必须馈送到GPU的大尺寸数据块,以便它为了实现其最大计算性能,仍然限制潜在使用在某些地区的技术。在雷达信号处理中,必须解决这两个问题,因为所需的吞吐量可以非常大,并且由于所需的处理延迟相对较小,无法在任意大块中处理数据。在本文中,提出了由FPGA和GPU器件组成的异构雷达处理器,并描述了其模型实现。呈现的性能分析表明,主要设计要求 - 通过放置,高的整体计算性能和低延迟。首先是通过远程直接存储器访问(RDMA)机制的帮助来实现,第二通过采用计算统一设备架构(CUDA)技术,以及通过申请艺术编程技术的施加状态并建立延迟/性能交易 - 关闭满足给定的设计约束。

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