Physical Design with a Critical Area Methodology

摘要

Increasing the yield of advanced integrated circuits with a high degree of reliability is a demanding task. The analysis of critical layout areas early in the design flow is a technique that is very promising in order to find and rework the so-called hot spots. In this paper, we describe practical implementations of a layout analysis flow that allows finding hot spots. Two versions are presented: a first one only relies on the geometry, while a second one takes into account the electrical information after LVS. The flows have been evaluated on industrial grade circuits using a wide range of process and show promising results.